1. Field of the Invention
The present invention relates to a semiconductor device having signal lines for a reference signal supplied to an internal circuit, and particularly relates to a semiconductor device having a shield structure for shielding the signal lines for the reference signal from noise and the like.
2. Description of Related Art
Generally, a reference signal is used in a semiconductor device in order to supply a reference voltage to internal circuits. The voltage value of the reference signal is required to be stable with a small fluctuation. It is desirable to design the semiconductor device having a structure in which signal lines for transmitting the reference signal are hardly affected by other adjacent signal lines. A semiconductor device has been conventionally proposed in which a shield structure surrounding the signal lines for the reference signal is formed so as to shield the lines from the noise affected by other lines (for example, see Laid-open Japanese Patent Publication No. 2000-353785).
FIG. 7 shows a cross-sectional view indicating a shield structure for a reference signal in a conventional semiconductor device 100. In the semiconductor device 100 shown in FIG. 7, an interlayer insulation film 102 is formed on a semiconductor substrate 101, and three wiring layers M1, M2 and M3 are stacked over the semiconductor substrate 101 from lower to upper. In addition, interlayer insulation films are formed between the respective wiring layers M1 to M3. A plurality of signal lines 103 for the reference signal is formed in the uppermost wiring layer M3. Further, a plurality of shield lines 104 adjacent to the signal lines 103 is formed in the same wiring layer M3. In the example of FIG. 7, three of the signal lines 103 for the reference signal and four of the shield lines 104 are shown.
A conductor pattern is formed in the wiring layer M2 under the wiring layer M3 so as to cover an entire surface of the upper opposing signal lines 103 for the reference signal. The conductor pattern of the wiring layer M2 and the shield lines 104 of the uppermost wiring layer M3 are connected via contact plugs 105 in a stacking direction. The conductor pattern of the wiring layer M2 functions as a shield plate for shielding interference from wirings formed in the lower wiring layer M1. In this manner, the shield structure shown in FIG. 7 includes the signal lines 103 and the shield lines 104 which are alternately arranged in the same wiring layer M3 and includes the conductive pattern functioning as the shield plate formed in the lower wiring layer M2 for the purpose of electromagnetically shielding the signal lines 103 for the reference signal.
In the semiconductor device 100 of FIG. 7, two wiring layers M3 and M2 are required for forming the shield structure. However, only three signal lines 103 for the reference signal can be arranged within a range shown in FIG. 7, it is structurally difficult to arrange the signal lines 103 in a high density. In this manner, when forming the shield structure by arranging a large number of the shield lines 104 for the reference signal in the above conventional semiconductor device 100, there is a problem that it is difficult to achieve an effective arrangement since multiple layers and a wide wiring area are required. In recent semiconductor devices, the chip size is determined by a restriction of an occupied area of the wiring area rather than restrictions of areas of elements such as transistors and the like, and therefore this has become a cause of hindering a reduction in chip size.